Memory size independent data
processing system and method

ABSTRACT

A DATA PROCESSING SYSTEM HAVING AN ARCHITECTURE IN WHICH ALL FUNCTIONS ARE CONDUCTED EMPLOYING A METHOD OF VIRTUAL MEMORY ADDRESSING, INCLUDING ALL INPUT AND OUTPUT FUNCTIONS. ANY USE OF MEMORY BY THE SYSTEM, WHETHER FOR DATA, PROGRAM, WORKSPACE, ETC., IS BY VIRTUAL ADDRESS, REQUIRING TRANSLATION TO A REAL ADDRESS. THE SOLE FUNCTION EMPLOYING REAL ADDRESSES IS A VIRTUAL MEMORY PAGING OPERATION WHICH IS SEPARATE FROM ALL OTHER INPUT/ OUTPUT FUNCTIONS. IN THIS MANNER, THE SYSTEM CONSIDERS ALL PROGRAMMING AND ALL DATA TO BE LOCATED IN A LARGE VIRTUAL MEMORY BUT WHICH ARE ACTUALLY PAGED INTO A REAL MAIN MEMORY AS NEEDED.

EEFENSEJE PUBHEATWN UNITED STATES PATENT AND TRADEMARK OFFICE Published at the request of the applicant or owner in accordance with the Notice of Dec. 16, 1969, 869 (1G. 687. The abstracts of Defensive Publication applications are identified by distinctly numbered series and are arranged chronologically. The heading of each abstract indicates the number of pages of specification, including claims and sheets of drawings contained in the application as originally filed. The files of these applications are available to the public for inspection and reproduction may be purchased for 30 cents a sheet.

Defensive Publication applications have not been examined as to the merits of alleged invention. The Patent and Trademark Oiilcc makes no assertion as to the novelty of the disclosed subject matter.

PUBLISHED NOVEMBER 4, 1975 9&0 0G. 6

n :2 22 a C ECUl-ATE n3 fi cis-rra T0 N0 wnsrssss or wrung LGISTER NCN'ER I DRESSES msrs. lNSTRUCTlCh? /YES 3) c m i%iion PW? is i ES l "Erase A data processing system having an architecture in which all functions are conducted employing a method of virtual memory addressing, including all input and output functions. Any use of memory by the system, whether for data, program, workspace, etc., is by virtual address, requiring translation to a real address. The sole function employing real addresses is a virtual memory paging operation which is separate from all other input/ output functions. In this manner, the system considers all programming and all data to be located in a large virtual memory but which are actually paged into a real main memory as needed.

NO PAGE FAULT? NOV. 4, 1975 c. D. COLEMAN T940,003 MEMORY SIZE INDEPENDENT DATA PROCESSING SYSTEM AND METHOD Original Filed Nov. 12, 1973 Sheet 1 of 25 N CONTROL 60w g g DEVICES FIG, i

F T EXTERNAL. EXTERNAL ,2 ,1 SD80 ,5 BUS 0m BUS m ,4 8

A&B MAIN LOCAL E N iiiii I si oiii eE iif si8iiE L RE'giBER E REGIZSTER Aiu ASSEMBLER TASSEMBLER sg A w CONTROL i 1 E LSDBI LSDBO E MAIN LOCAL STORAGE Imiifiic ADDRESSING Z Bus :5 MODE & MMSK REG.

k l m im Q ay.

21 20 H INSgE IIiEEIION ZTART FIG. 2

EGISTER TO ADg% \L .J E EEEEEE 1N s siiioii YES 23? PROCESS T INSTRUCTION YES L35 25 36 PAGE FAULT PROGRAM Nov. 4, 1975 c. D. COLEMAN T940,003

MEMORY SIZE INDEPENDENT DATA PROCESSING SYSTEM AND METHOD Original Filed Nov. 12, 1973 Sheet 2 of 25 CICYA IN'IERRUPT? SAVE P REGISTER FETCH FIRST TWO AND REPLACE BY INSTRUCTION F 02 BYTES f c1 1c CHECK IC FOR I PAGE DARY Y NTINUE D I F INS CALCULATE ADDRESSES OF NON-RR INSTRUCTION CHECK 1c FOR 'ZRANSLATE PAGE BOUNDARY wmzass SPILL Nov. 4, 1975 c. D. COLEMAN T940,003

MEMORY SIZE INDEPENDENT DATA PROCESSING SYSTEM AND METHOD Original Filed Nov. 12, 1973 Sheet 3 of 25 PROCESS INDICATED ss FORMAT? INSTR.

SSK 07A1 ISK O7A1 O8A2 S M O8A2 LPSW O9A1 R 12Al 80 AL 12AI a: FILE- 13A2 IRsK---- 18G1 SRSK 1BG1 LOAD H REGISTER MVRC-- 19G2 GO 20B2 PGI 20B2 'rR 35E2 ED 35E2 REM F1 G 1 81 M CKSPL c CK FOR PAGE BOUNDARY s=ILL 1s'r OPERAND NORMAL CKSPL OF 2ND INSTRUCTION OPERAND PROCESSING PROCESS CICYA INSTRUCTION CICYA Nov. 4, 1975 READ OR WRITE? READ READ

COMMANDS O COUNT OR EOB? CONTINUE I/O PROCESSING CICYA A1 REMOVE LAST FAULT STPACKED TN AUX.FMODULE FIG. 6

C. D. COLEMAN MEMORY SIZE INDEPENDENT DATA PROCESSING SYSTEM AND METHOD Original Filed Nov. 12, 1973 q 1 SAVEVIRTUAL IN MODULE D FLAG IN D2 PAGE FAULT INTERRUPT YES A2 PAGE FAULT INTERRUPT ADTRN TRANSLATE ADDRESS CKSPL CHECK FOR PAGE SPILL PAGE FAULT? CLEAR FLAG IN EOLPF FOFF FIG. 5

MOVE INPUT DATA FROM AUX. TO PROGRAM STORAGE CICYA Sheet 4 of 25 NOV. 4, 1975 c. D. COLEMAN T940,003

MEMORY SIZE INDEPENDENT DATA PROCESSING SYSTEM AND METHOD Original Filed Nov. 12, 1973 Sheet 5 Of 25 SET REGISTE TO VIRTUAL ADD SS OF KEY 1 H ADTRN 1S0 TRANSLATE CALCULATE ADDRESS NUMBER OF EYTES 151 l CKSPL B3 CHECK FOR PAGE FAULT PAGE SPILL INTERRUPT EXECUTE STM INSTRUCTION EXEC E LM INST CTION CICYA FIG. 8

NOV. 4, 1975 c. D. COLEMAN T940,003

MEMORY SIZE INDEPENDENT DATA PROCESSING SYSTEM AND METHOD Original Filed Nov. 12, 1973 Sheet 6 of 25 A3 LOAD PROGRAM STATUS WORD CICYA CLEQR INDICATOR RE ET CHAIN a READY NEXT FT 9 200 ADTRN NEW PSW TRANSLATED UNTRN. CURRENT DEVELOP PROGRAM INSTR. COUNTER CHECK INTERRUPT a RECOVER LAST ADDREss FROM AUX. STORAGE RESET sa FIG. 10

Nov. 4, 1975 c. D. COLEMAN T940,003

MEMORY SIZE INDEPENDENT DATA PROCESSING SYSTEM AND METHOD Original Filed Nov. 12, 1973 Sheet 7 of 25 INHIBIT TRAPS FIG. H

CCOM I', SAVER SAVE LOCAL STORAGE FOR WORK REGISTER FAULT CLEARED? D1 DI. D

ADDRESS OF U CONSTRUC'IED SET S4 SET 1052 MODE D-REGISTER EOLPF RE EST OUTSTNDNG FAULT 197 F YES I/O INTERRUPT CHECK CS" II STOR D? UNTRAN ATE SERVICE REQUEST ADMEEW FOR CICYA LOAD NIH PSW NOV. 4, 1975 c. D. COLEMAN T940,003

MEMORY SIZE INDEPENDENT DATA PROCESSING SYSTEM AND METHOD Original Filed NOV. 12, 1973 Sheet 8 Of 25 UNTRANSLATE STORED IC EXECUTF BR rCH STRUCTI ON ADTRN 213 TRANSLATE READ LOW TWO ADDRESS BYTES OF ADDRESS FIG. 12

TAKE ".C'vi TRANSLATE (CW A RESS AND ADDRESS AND RES JAI. COUNT DATA ADDRESS B NO FIG. 14

STORE CSW 2 PAGE FAULT INTERRUP'I PLACE VIRTUAL l. ADDRESS 1N 'X STORAGE J BF FIG. 13

NOV. 4, 1975 Cl Di COLEMAN T940,003

MEMORY SIZE INDEPENDENT DATA I PROCESSING SYSTEM AND METHOD Original Filed Nov. 12, 1973 Sheet 9 of 25 CCW SET STATUS MODIFIER? 520B TIC T RTR TE TRANSLATION PROCESS PATH DEFI D BY LAST ENCO TERED TIC ADDRESS FIG. 5

TRANSLATE ALL W ATA D SSES POINT TO BEGINNING OF PRETRANSLATED STACK LOAD FIRST ADDRESS F STACK INTO H FIG. i6

PROCESS FIRST CCW NOV. 4, 1975 c. D. COLEMAN T940,003

MEMORY SIZE INDEPENDENT DATA PROCESSING SYSTEM AND METHOD Original Filed Nov. 12, 1973 Sheet 10 of 25 MASK OFF TRAPS FOR CHANNEL 1 PGIO NO I S CHANNEL ENABLE TRAPS 1 AVAILABLE? FIG. 20

YES

ECK 'DISK ASE GATE SA P GI STER IN UX B8TORAGE CONTINUE s10 PROCESS CICYA 18 19 G1 G2 270 l 280 1 l ,1 a ACCESS REAL ADDRESS FROM MOVE SPECIFIED SPECIFIED LOCATIONS REGISTER F'G- 8 ("ICYA NOV. 4, 1975 c. D. COLEMAN T940,003

MEMORY SIZE INDEPENDENT DATA PROCESSING SYSTEM AND METHOD Original Filed Nov. 12, 1973 Sheet 11 of 25 EXERC VARIOUS LE (ONTROL'S FIG. 21

ASSLGN FILE TRAP TO PAGE 310 HISEK SELECT CORRECT HEAD NUMBER SET UP FILE INITIATE A ZONE IN ZONE 1 REQUIRED S OF LOCAL MOTION STORAGE LMOVE INFORMATIO FROM CPU 20 TO ZONE! Q4 ST E: CNT/KEY AD P64 OP CODE, DA ADDR AND IC TN AUX STORAGE Nov. 4, 1975 C. D. COLEMAN MEMORY SIZE INDEPENDENT DATA PROCESSING SYSTEM AND METHOD Original Filed Nov. 12, 1973 FILE PHASE 1s SEEK ADVANCE PA MOTION IN 1 0 FILE PH E PROGRESS? COUNTER CPU STATE co TO NEXT RESTORED FILE PHASE HSEK 23B3 CKCT 26B1 DATA-- 28B2 c D-- 29A1 H 1 34B1 (ICYA Sheet 12 of 25 CLEAR FILE-GATED ATTENTION IF ANY CHECK FILE FOR ERRORS YES i HARD STOP TRAP LATCH RESET NOV. 4, 1975 c. D. COLEMAN T940,003

MEMORY SIZE INDEPENDENT DATA PROCESSING SYSTEM AND METHOD Original Filed Nov. 12, 1973 Sheet 13 of 25 HSEK i SPCNT 340 j 345 u Lu. SEEK HEAD SPACECOUNT TO SPECIFIED NEXT REEORD MARKE E LE FIG. 23 FIG. 24

B1 B1 550 RDCT 360 l CKCT 31 131 SET FILE. PHASE TO =1 Si) CKCT PICK UP RECORD WILL BE NEXT NUMBER PHASE COUNT REGISTER COMBINE RECORD SET TO 8 NO. AND FORMAT TYPE FILE OPERATION FOR READ COUNT ATA PHASE DEVELOPED IN BREAKOUT REG WT 27B2 RS-- 3OE2 RDCT 25B1 SPCT 24B2 S E-- 32B3 353 O 3 33G2 TRANSMIT READ COUNT SIGNAL TO FILE Nov. 4, 1975 c. D. COLEMAN T940,003

MEMORY SIZE INDEPENDENT DATA PROCESSING SYSTEM AND METHOD Original Filed Nov. 12, 1973 Sheet 14 of 25 570 RDWT 371 TRANSMIT "READ" S COUNT OF "WRI E" OP B ES IN KEY DE TO FILE FIELD J FIG. 27

TRANSMI'I RETURN SIGNALS TO FILE SET CCW CHAINING FIG. 28

PLACg DATA s -1 383 I FIL 1s SIG D TO READ ITE DATA ECORD RETURN NOV. 4, 1975 c. D. COLEMAN T940,003

MEMORY SIZE INDEPENDENT DATA PROCESSING SYSTEM AND METHOD Original Filed Nov. 12, 1973 Sheet 15 of 25 390 CKND UPDATED DATA ADDRESS STORED IN AUX. STORAGE rose ADVANCE DATA ADDRESS IN AUX. STORAGE T 2ND HALF 01? GE (1024 ADDED) G SET REVERSE FLAG FILE PHASE SET LAST RECORD FLAG CHECK CHECK REVERSE FLAG SEEKED FLAG REDUCE DATA G. 9 ADDRESS BY 2on8 Nov. 4, 1975 C. D. COLEMAN T940,003

\ MEMORY SIZE INDEPENDENT DATA PROCESSING SYSTEM AND METHOD Original Filed Nov. 12, 1973 Sheet 16 of 25 B3 B1 420 l SEKE 440 1 HDSK u FETCE oDD EAD FETCH HEAD NO. EK FRO ARY s12 LOC ION FROM AUXILIARY STORAGE SET TO EVEN HEAD NUMBER STORE PAGE I/O RESTORE STATE COMPLETE FLAG OF CHIFX EINEL AND EPGIO 411 LHO FIG. 31

RESTORE FILE TRAP LOCATION RETURN NOV. 4, 1975 c. D. COLEMAN T940,003

MEMORY SIZE INDEPENDENT DATA PROCESSING SYSTEM AND METHOD On'ginal Filed Nov. 12, 1973 Sheet 17 of 25 CKIC cor 'iPARE 1c BOUNDARY A63 A64 q ADTRN YES IC RETRANSLATED TO NEW PAGE CROSSED? IS PAGE IN REAL MEMORY? D3 PAGE FAULT INTERRUP'I RETURN E2 A50 D l CTRT 451 m CKSPL USEHCOUNT OF cfiEcK FOR 256 FOR SPILL OF CHECKING SPILL TRANSLATE OF TRANSLATE TABLE TABLE 45 1 p1 UNTRN n53 UNTRANSLATE IS INSTR.

RESULT EITHER EDMK OR 'IRT? EXECUTE INSTRUCTION ADDRESS FIG. 35

NOV. 4, 1975 c. D. COLEMAN T940,003

MEMORY SIZE INDEPENDENT DATA PROCESSING SYSTEM AND METHOD Original Filed Nov. 12, 1973 Sheet 18 of 25 ADDRESS ADDRESS TRANSLATION UNTRANSLATION 7m 480 ADTRN UNTRN E1 B3 EXTRACT PAGE EXTRACT REAL NUMBER FROM PAGE NUMBER ADDRESS TO BE FROM ADDRESS TO TRANSLATED BE UNTRANSLATED FIG. 37

\ SAVE PAGE CONCATENATE NUMBER IN AUX. REAL MEMORY STORAGE FOR TABLE ORIGIN POSSIBLE PAGE WITH REAL PAGE I FAULT NUMBER D1 D CONCATENATE PAGE TABLE FETCH REAL ORIGIN WITH MEMORY TABLE PAGE NUMBER ENTRY INSERT VIRTUAL FETCH PAGE PAGE NO. FROM TABLE ENTRY REAL MEMORY FROM PAGE TABLE TABLE ENTRY INTO ADDRESS F2 F3 PAGE FAULT INTERRUPT RETURN FIG. 38

PAGE VALID? (I .E. IN MEMORY] YES INSERT REAL PAGE LOCATION IN THE ADDRESS RETURN Nov. 4, 1975 c. D. COLEMAN T940,003 MEMORY SIZE INDEPENDENT DATA PROCESSING SYSTEM AND METHOD Original Filed Nov. 12, 1973 Sheet 19 of 25 BOUNDARY SPT TIL? LOAD H-REGISTER WIT REAL ENTRY AT POINT INDICATED BY J RETURN INCREMENT V BY STEP H-REGIS'IER sToRE v IN FOXE TO NExT PAGE NUMBER ,1 G I," DECREMENT P BY COMPARE H SET CONTIGUITY 2 AND v BIT EQU \ LOADW-REGISTER H FROM REAL CHECK NUMBER OF PAGE FAULT MEMORY TABLE PAGES vIA THE INTERRUPT LUQATIUN P-REGISTBR 

